Интегрална схема HEF4024BP
It.№: 055403
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;7-stage binary ripple counter with a clock input (CP), and overriding asynchronous master reset input (MR) and seven fully buffered parallel;TC4024BE;CD4024 DIP-14
;7-stage binary ripple counter with a clock input (CP), and overriding asynchronous master reset input (MR) and seven fully buffered parallel;TC4024BE;CD4024 DIP-14
Details
Корпус
DIP-14
